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Strany 1 - Diagnostic Road Map

CHALLENGE™/Onyx™Diagnostic Road MapDocument Number 108-7045-030

Strany 2

xFigure 3-15 Power Subsystem Voltage Monitoring...3-16Figure 4-1 System Controller Input/Output Signals..

Strany 3 - Contents

5-2 PROM MonitorFigure 5-1 IP19 Power-On Test Sequence (Part 1 of 4)Set up R4400registersCC chiplocal testCC chipconfig TestFlashLEDsFailFlashLEDsFail

Strany 4

CHALLENGE/Onyx Diagnostic Road Map 5-3Figure 5-2 Power-On Test Sequence (Part 2 of 4)Configure the CC chip-Config Regs.1Begin BootmasterArbitrationWai

Strany 5

5-4 PROM MonitorFigure 5-3 Power-On Test Sequence (Part 3 of 4)Configureconsole portTestmain IO4Configure cacheas stack - jump toC code2PassDisplay me

Strany 6

CHALLENGE/Onyx Diagnostic Road Map 5-5Figure 5-4 Power-On Test Sequence (Part 4 of 4)5.2.2 IP21 Power-On TestsThe power-on test sequence for the IP19

Strany 7

5-6 PROM Monitor.Figure 5-5 IP21 Power-On Test Sequence (1 of 4)Test IcacheInitialize LED values,SR, and trap registersAIP21 Power−On and Configuratio

Strany 8

CHALLENGE/Onyx Diagnostic Road Map 5-7Figure 5-6 IP21 Power-On Test Sequence (2 of 4)Am I thebootmaster?Wait for time determinedby slot numberCBootmas

Strany 9

5-8 PROM MonitorFigure 5-7 IP21 Power-On Test Sequence (3 of 4)Send "I'm alive" interruptBSlave CodeInvalidate andtest D cachePrintdiag

Strany 10

CHALLENGE/Onyx Diagnostic Road Map 5-9Figure 5-8 IP21 Power-On Test Sequence (4 of 4)InitializeIO4Init EPC UARTReport CPU andmemory enabledCLoad IO4 P

Strany 11

5-10 PROM Monitor5.3 Power-On Test Status MessagesThis section lists of all of the status messages that are displayed by the System Controllerduring t

Strany 12

CHALLENGE/Onyx Diagnostic Road Map 5-1113. Reading inventory...Displayed before we attempt to read the system inventory out of the IO4 NVRAM. Ifthe in

Strany 13 - Introduction

xiTablesTable 1-1 Bus Types in Everest Deskside and Rackmount Systems...1-4Table 2-1 Likely Causes of Common System Problems...

Strany 14

5-12 PROM Monitor31. Initing graphics...Displayed when we initialize the graphics device (if any).32. Starting slaves...Displayed when we kick the sla

Strany 15 - 1. Theory of Operations

CHALLENGE/Onyx Diagnostic Road Map 5-13Turn off individual banks of memory:Type disable x y, where x is the slot number of the selected memory boardan

Strany 16 - 1-2 Theory of Operations

5-14 PROM MonitorCOUNTER Runs until a certain instruction count is reached andpassed. The count is proportional to the Niblet process ID.MPMON Verifies

Strany 17

CHALLENGE/Onyx Diagnostic Road Map 5-15As long as there are more processes than processors, Niblet tests will migrate. This is whythere are three copi

Strany 18 - 1.2 System Buses

5-16 PROM Monitorthe IP19 PROM causes the appropriate error message to be displayed. If the system is aserver, the error message is also displayed on

Strany 19

CHALLENGE/Onyx Diagnostic Road Map 5-175.6.1 IP19 PROM Messages (Short Form)001 DCACHE FAILED!002 DCACHE FAILED!003 SCACHE FAILED!004 SCACHE FAILED!00

Strany 20 - 1-6 Theory of Operations

5-18 PROM Monitor5.6.2 IP19 PROM Messages (Long Form)040 Memory board configuration has failed. Cannot load IO PROM.041 All memory banks had to be dis

Strany 21 - 1.2.2 Polled Serial Bus

CHALLENGE/Onyx Diagnostic Road Map 5-195.6.3 Diagnostic Codes and Their MeaningsThe following diagnostic codes provide information on these areas of t

Strany 22 - 1.2.4 SCSI Bus

5-20 PROM Monitor5.6.3.3 Ebus Error Codes060 CPU doesn’t get interrupts from CC.061 Group interrupt test failed.062 Lost a loopback interrupt.063 Bit

Strany 23 - 1.2.5 FCI Bus

CHALLENGE/Onyx Diagnostic Road Map 5-21240 CPU writing configuration info.242 Error in POD command243 Starting dcache test.244 Starting icache test.24

Strany 25 - 2. Diagnostic Procedures

5-22 PROM MonitorOnce the system enters POD mode, you should display error registers. Enter the followingcommand at the POD prompt (POD 03/00>):dev

Strany 26 - 2.2 Examining a Frozen System

CHALLENGE/Onyx Diagnostic Road Map 5-23Locate all the IP19 boards and their slots. Then enter a dc command for each IP19 slot,where the first argument

Strany 27 - DBG: prompt?

5-24 PROM MonitorLocate all the MC3 boards and their slots. Then enter a dmc command for each MC3 slot,where the argument is the hex slot number.For e

Strany 28 - 2.3 Diagnosing a System Panic

CHALLENGE/Onyx Diagnostic Road Map 5-255.7 CPU Board Fault/Status IndicatorsThe IP19 and IP21 CPU boards have one bank of six LEDs for each processor

Strany 29 - 2.4 ASIC Error Detection

5-26 PROM MonitorError codes are displayed if a fatal error prevents the power-on tests from completing. TheLEDs will flash the error value until the s

Strany 30 - 2-6 Diagnostic Procedures

CHALLENGE/Onyx Diagnostic Road Map 5-27LSB O O O O X O MSB PLED_BMASTER (16) - This processor is the bootmaster.LSB X O O O X O MSB PLED_CKEBUS2 (17)

Strany 31 - 2.4.1 Error Messages

5-28 PROM Monitor5.7.2 IP19 LED Error CodesTable 5-6 lists the IP19 board power-on test failure LED codes.LSB X X X O O X MSB PLED_CKSCACHE2 (39) - Ch

Strany 32 - 2-8 Diagnostic Procedures

CHALLENGE/Onyx Diagnostic Road Map 5-295.7.3 IP21 LED Status CodesTable 5-7 lists the IP21 status codes:LSB X X X O X X MSB FLED_BADCACHE (55) - CPU’s

Strany 33

5-30 PROM MonitorLSB X O X X O O MSB PLED_NOCLOCK_INITUART (13) - CC clock isn’t running inituart anywayLSB O X X X O O MSB PLED_CCINIT2 (14) - Init C

Strany 34 - IP19 Board Error Messages

CHALLENGE/Onyx Diagnostic Road Map 5-31LSB X O O X X X MSB PLED_SCACHE_TAG_DATA (57)LSB O X O X X X MSB PLED_SCACHE_ADDR (58)LSB X X O X X X MSB PLED_

Strany 35

xiiiIntroductionThis document describes the various diagnostic tools available with the Everest board setand their relationship to the Everest system

Strany 36 - 2-12 Diagnostic Procedures

5-32 PROM Monitor5.7.4 IP21 LED Error CodesTable 5-8 lists the IP21 board power-on test failure LED codes:LED Pattern DisplayedX=LitO=UnlitDescription

Strany 37

CHALLENGE/Onyx Diagnostic Road Map 5-335.7.5 LED Power-On Status CodesWhen the Power-on Diagnostics (POD) are running, a pair of LEDs from each bank o

Strany 38 - IP21 Board Error Messages

5-34 PROM MonitorCheck the current system configuration using either the hinv command, or two variationsof it: hinv -b and hinv -b -v:• hinv performs e

Strany 39

CHALLENGE/Onyx Diagnostic Road Map 5-35diskless=0dbaud=9600sgilogo=ynetaddr=192.48.150.68ConsoleOut=multi(0)serial(0)ConsoleIn=multi(0)serial(0)cpufre

Strany 41

CHALLENGE/Onyx Diagnostic Road Map 6-1Chapter 66. Interactive Diagnostics Environment (IDE)6.1 OverviewThis chapter describes the Everest board tests

Strany 42 - 2-18 Diagnostic Procedures

6-2 Interactive Diagnostics Environment (IDE)4. Select the appropriate testing modes. The different testing modes change the way thatthe tests run. No

Strany 43

CHALLENGE/Onyx Diagnostic Road Map 6-3After setting the report level, choose a test mode (if desired). The following modes areavailable:quickmodeRuns

Strany 44 - IO4/VCAM Error Messages

6-4 Interactive Diagnostics Environment (IDE)6.3.1 IO4 InterfaceTable 6-2 shows the tests available for the IO4 interface.Test Function Descriptionche

Strany 45

CHALLENGE/Onyx Diagnostic Road Map 6-56.3.2 VME AdapterTable 6-3 lists the VME adapter testsTest Function Descriptionfregs Test the VMECC F chip Check

Strany 47

6-6 Interactive Diagnostics Environment (IDE)vmeregs Test the VMECC registers Performs a register test on the followingvmecc registers:VMECC_RMWMASKVM

Strany 48 - 2.4.1.4 MC3 Memory Board

CHALLENGE/Onyx Diagnostic Road Map 6-7vmelpbk Test the VMECC loopbackcapabilityThis test performs VME accesses in A24 PIOLoopback mode and A32 PIO Loo

Strany 49

6-8 Interactive Diagnostics Environment (IDE)6.3.3 SCSI AdapterTable 6-4 lists the IO4 SCSI adapter testsTest Function DescriptionS1_regtest Read/wri

Strany 50 - 2-26 Diagnostic Procedures

CHALLENGE/Onyx Diagnostic Road Map 6-96.3.4 Everest Peripheral Controller (EPC)Table 6-5 lists tests for the Everest peripheral controller (EPC) on th

Strany 51 - 2.5 Troubleshooting

6-10 Interactive Diagnostics Environment (IDE)epc_rtcreg Read/write test for the real-timeclock (RTC) chip and NVRAMTests the RTC registers and asmall

Strany 52 - 2-28 Diagnostic Procedures

CHALLENGE/Onyx Diagnostic Road Map 6-116.4 IP19 IDE TestsThe IP19 IDE tests are divided into four categories:• IP tests, described in Section 6.4.1, “

Strany 53

6-12 Interactive Diagnostics Environment (IDE)There are several commands that run a battery of tests. These commands are:ipall Invokes tests ip1 throu

Strany 54 - 2-30 Diagnostic Procedures

CHALLENGE/Onyx Diagnostic Road Map 6-136.4.1 IP TestsThere are eight IP tests. These test components that are not covered by the TLB, FPU, andCACHE te

Strany 55 - Task Command Comment

6-14 Interactive Diagnostics Environment (IDE)The following sections provide details about each test.ip1 (local_regtest) - Check CC Local RegistersBas

Strany 56

CHALLENGE/Onyx Diagnostic Road Map 6-15ip2 (cfig_regtest) - Check Configuration RegistersBasic write/read test for the configuration registers. The regis

Strany 57

CHALLENGE/Onyx Diagnostic Road Map 1-1Chapter 11. Theory of Operations1.1 OverviewThis chapter introduces the Everest (POWERpath-2) board set and show

Strany 58 - 2-34 Diagnostic Procedures

6-16 Interactive Diagnostics Environment (IDE)ip5 (intr_level0) - Check IP19 Level 0 InterruptThis test generates level-0 interrupts at different prio

Strany 59 - 2.6 Error Message Syntax

CHALLENGE/Onyx Diagnostic Road Map 6-17ip8 (intr_group) - Check IP19 Processor Group InterruptThis test generated level 0 interrupts using different p

Strany 60 - 2.7 Known Problems

6-18 Interactive Diagnostics Environment (IDE)tlb4 (tlb_valid) - Check TLB Valid ExceptionTests to see if TLB invalid accesses generate exceptions. Ma

Strany 61 - 2.7.6 SIMM failures

CHALLENGE/Onyx Diagnostic Road Map 6-19tlb8 (tlb_c) - Check C Bits In TLB EntryAttempts to access TLB-mapped memory in both cached and uncached modes.

Strany 62 - 2.7.7 IP19 EAROM Corruption

6-20 Interactive Diagnostics Environment (IDE)fpu2 (fpmem) - FPU Load/Store Memory TestLoads FPU from memory and stores memory from FPU.Possible error

Strany 63 - 2.7.9 MC3 SIMM Failure

CHALLENGE/Onyx Diagnostic Road Map 6-21fpu7 (fmulsubs) - FPU Multiply/Subtract (Single Precision)Tests multiplication and subtraction using simple sin

Strany 64

6-22 Interactive Diagnostics Environment (IDE)fpu12 (funderflow) - FPU Underflow TestGenerates a single-precision overflow by dividing an at-the-limit sm

Strany 65 - 3. Power Subsystem

CHALLENGE/Onyx Diagnostic Road Map 6-236.4.4 Cache TestsThere are forty-eight tests to check the primary and secondary cache of the MIPSR4000/R4400. T

Strany 66 - 3-2 Power Subsystem

6-24 Interactive Diagnostics Environment (IDE)cache5 (PdTagKh) - Primary Data TAG Knaizuk Hartmann TestThis tests the data integrity of the primary da

Strany 67

CHALLENGE/Onyx Diagnostic Road Map 6-25cache8 (PiTagKh) - Primary Instruction TAG RAM Knaizuk Hartmann TestThis tests the data integrity of the primar

Strany 68 - 3-4 Power Subsystem

1-2 Theory of OperationsFigure 1-1 Everest Functional Block DiagramMC31MC32IP19/IP212IP19/IP211 (MasterCPU)SystemControllerStatusPanelCoolingFansOffli

Strany 69 - 3.2.2 System and Power Boards

6-26 Interactive Diagnostics Environment (IDE)cache12 (d_tagparity) - Primary Data TAG RAM Parity TestThis tests the functionality of the parity bit i

Strany 70 - 3-6 Power Subsystem

CHALLENGE/Onyx Diagnostic Road Map 6-27cache15 (d_slide_data) - Primary Data RAM Data Line TestPossible errors:0104021: D-cache tag functional error i

Strany 71

6-28 Interactive Diagnostics Environment (IDE)cache17 (d_kh) - Primary Data RAM Knaizuk Hartmann TestThis tests the data integrity of the D-cache with

Strany 72

CHALLENGE/Onyx Diagnostic Road Map 6-29cache20 (d_function) - Primary Data Functionality TestThis tests the functionality of the entire data cache. It

Strany 73 - 3.2.3 SCSIBox Drive Enclosure

6-30 Interactive Diagnostics Environment (IDE)cache23 (i_tagcmp) - Primary Instruction TAG RAM Comparitor TestThis tests the comparator at the I-cache

Strany 74 - 3.3 Power-On Sequence

CHALLENGE/Onyx Diagnostic Road Map 6-31cache26 (i_aina) - Primary Instruction Data RAM Address In Address TestPerforms an address in address test on t

Strany 75

6-32 Interactive Diagnostics Environment (IDE)cache30 (i_hitwb) - Primary Instruction Hit Writeback TestThis tests the Hit Writeback cache operation o

Strany 76 - 3-12 Power Subsystem

CHALLENGE/Onyx Diagnostic Road Map 6-33cache33 (d_hitwb) - Primary Data Hit Writeback TestThis is hit writeback cache operation on the data cache.Poss

Strany 77

6-34 Interactive Diagnostics Environment (IDE)cache35 (d_refill) - Primary Data Refill from Secondary Cache TestThis verifies the block write/read mode i

Strany 78 - 3.3.1 Isolating Errors

CHALLENGE/Onyx Diagnostic Road Map 6-35cache37 (sd_dirtywbh) - Secondary Dirty Writeback (Half-word) TestThis verifies the block (four words) write mod

Strany 79

CHALLENGE/Onyx Diagnostic Road Map 1-3Figure 1-2 IO4 Functional Block DiagramThe available diagnostic tools are separated into six groups: parity chec

Strany 80 - 3-16 Power Subsystem

6-36 Interactive Diagnostics Environment (IDE)cache40 (sdd_hitinv) - Secondary Hit Invalidate TestThis verifies the Hit Invalidate cache operation.Poss

Strany 81

CHALLENGE/Onyx Diagnostic Road Map 6-37cache41 (sd_hitwb) - Secondary Hit Writeback TestThis verifies the hit writeback cache operation. It verifies tha

Strany 82

6-38 Interactive Diagnostics Environment (IDE)cache42 (sd_hitwbinv) - Secondary Hit Writeback Invalidate TestThis verifies the hit writeback invalidate

Strany 83 - 4.1 Overview

CHALLENGE/Onyx Diagnostic Road Map 6-39cache43 (cluster) - Secondary Cluster TestPossible errors:0105075: SCache data incorrectly written to memory du

Strany 84 - 4.2 Basic Functions

6-40 Interactive Diagnostics Environment (IDE)cache48 (cache_states) - Complete Cache-State Transitions TestThere are twenty-two individual cache test

Strany 85

CHALLENGE/Onyx Diagnostic Road Map 6-41Cache State Transition Test Descriptioncstate0 (RHH_CE_CE) Read hit primary (CE) and secondary (CE).Check that

Strany 86

6-42 Interactive Diagnostics Environment (IDE)cstate11 (WMH_DE_DE) Write miss primary (DE) and hit secondary (DE).cstate12 (RMM_I_I) Read miss primary

Strany 87 - – Immediate Power-Off

CHALLENGE/Onyx Diagnostic Road Map 6-43Possible errors:010707d: RHH_CE_CE : physaddr 0x%x contents incorrect (0x%x)010707e: RHH_DE_DE : physaddr 0x%x

Strany 88

6-44 Interactive Diagnostics Environment (IDE)6.5 MC3 IDE TestsTo start an MC3 IDE test, boot IDE from the Command Monitor. See Section 6.2, “Runninga

Strany 89 - – Delayed Power-Off

CHALLENGE/Onyx Diagnostic Road Map 6-45After setting the report level, choose a test mode (if desired). The following modes areavailable:quickmode For

Strany 90 - – Informative

1-4 Theory of Operationssequence and display an error message. Error information is also provided by a series ofLEDs on the off-line switchers and the

Strany 91 - Error Message Error Meaning

6-46 Interactive Diagnostics Environment (IDE)Table 6-10 lists and describes the available MC3 diagnostic commands.Test Function Descriptionmem1 Read

Strany 92 - 4.4 Sensor Locations

CHALLENGE/Onyx Diagnostic Road Map 6-47mem4 Write/Read data patterns(ported from the IP17 mem3 test)(4 minutes/128 MB)This test does wordread/writes o

Strany 93 - 4.5 Menu Hierarchy

6-48 Interactive Diagnostics Environment (IDE)mem6 Walking ones and zeros memorytest (slow; 40 minutes/32 MB)Another traditional test –walking ones an

Strany 94 - Rackmount Systems

CHALLENGE/Onyx Diagnostic Road Map 6-49mem9 Memory with ECC test (portedfrom the IP17 mem6 test)(2 minutes/128 MB)This test writes to memory viauncach

Strany 95

6-50 Interactive Diagnostics Environment (IDE)mem11 User-specified pattern/locationwrite/read test (ported from theIP17 mem7 test)Typing mem11 with noa

Strany 96 - 4.5.3 Debug Menu

CHALLENGE/Onyx Diagnostic Road Map 7-1Chapter 77. IRIX Error Reporting7.1 OverviewThis section describes the various types of UNIX kernel messages dis

Strany 97

7-2 IRIX Error Reporting7.2.1 Interpreting Panic MessagesThe following message usually indicates a hardware problem:WARNING: Kernel Bus Error Exceptio

Strany 98

CHALLENGE/Onyx Diagnostic Road Map 7-37.2.1.1 IP19-Specific MessagesThe following message means that the R4400 detected a problem in its interface to t

Strany 99 - 5. PROM Monitor

7-4 IRIX Error ReportingHARDWARE ERROR STATE Caused by SoftwareThe following message can be caused by software that mistakenly generates a non-existen

Strany 100 - 5-2 PROM Monitor

CHALLENGE/Onyx Diagnostic Road Map 7-57.4 Driver MessagesThe driver message syntax is: dddn: xxxx, where “ddd” is a two- or three-character stringindi

Strany 101

CHALLENGE/Onyx Diagnostic Road Map 1-5Figure 1-3 shows a block diagram of the system busesPeripheral buses SCSI buses Connect a variety of storage dev

Strany 102 - 5-4 PROM Monitor

a. All of these cause a controlled shutdown if the cleanpower flag is set to “on” using the chkconfig command.b. These are logged, but no action is ta

Strany 103 - 5.2.2 IP21 Power-On Tests

ContributorsWritten by Kameran Kashani and Greg MorrisIllustrated by Dan Young, Cheri Brown, Greg Morris, and Kameran KashaniEdited by Christina CaryP

Strany 104 - 5-6 PROM Monitor

1-6 Theory of Operations.Figure 1-3 Everest System BusesEach bus category is described in the following sections.1.2.1 Everest Address and Data BusesT

Strany 105

CHALLENGE/Onyx Diagnostic Road Map 1-7Figure 1-4 Everest Buses and Interface ASICs1.2.2 Polled Serial BusThis dedicated bus is embedded in the system’

Strany 106 - 5-8 PROM Monitor

1-8 Theory of OperationsFigure 1-5 Polled Serial BusThe polled serial bus provides a shortened error-reporting path to the System Controllerdisplay on

Strany 107

CHALLENGE/Onyx Diagnostic Road Map 1-9IO4. The fourth digit represents a specific drive; the fifth digit is the partition on theselected drive. See Figu

Strany 109

CHALLENGE/Onyx Diagnostic Road Map 2-1Chapter 22. Diagnostic Procedures2.1 OverviewThis chapter describes how to• examine a frozen CHALLENGE, POWER CH

Strany 110 - 5-12 PROM Monitor

2-2 Diagnostic Procedures2.2 Examining a Frozen SystemWhen a system is frozen, it is either hung or the kernel has panicked. It is important todetermi

Strany 111 - 5.5 Niblet

CHALLENGE/Onyx Diagnostic Road Map 2-3If the system is still hung, follow these steps to help isolate the problem:1. Examine the serial port console,

Strany 112 - Test Description

2-4 Diagnostic ProceduresIf no error bits are set, then it is probably a software problem.Corrective action: File a bug report.6. If there is no respo

Strany 113

CHALLENGE/Onyx Diagnostic Road Map 2-5To examine the messages stored in the compressed kernel core dump file, use theuncompvm(1M) command. For example,

Strany 114 - 5-16 PROM Monitor

iiiContentsIntroduction...xiii1. Theory of

Strany 115

2-6 Diagnostic ProceduresA difficult fault to trace is one that occurs in an IP19-based system during a memory write.If an IP19 issues a memory or PIO

Strany 116

CHALLENGE/Onyx Diagnostic Road Map 2-7Figure 2-1 Everest Bus Parity Checkpoints2.4.1 Error MessagesWhen the hardware detects an error, IRIX and the di

Strany 117

2-8 Diagnostic Procedures2.4.1.1 IP19 CPU BoardFigure 2-2 is a functional block diagram of the IP19 board with the error detection pointscalled out. F

Strany 118

CHALLENGE/Onyx Diagnostic Road Map 2-9Figure 2-3 IP19 Board Component LocationsDASICDASICDASICDASICAASICCPUCCChipCPUCCChipCPUCCChipCPUCCChip

Strany 119

2-10 Diagnostic ProceduresIP19 Board Error MessagesHARDWARE ERROR STATE:IP19 in slot 1+ A Chip Error Register: 0xffff+ 0:CPU 0 CC->A p

Strany 120 - The output looks like this:

CHALLENGE/Onyx Diagnostic Road Map 2-11Note: The numbers following each error message correspond to the interface where theerror detection logic is lo

Strany 121

2-12 Diagnostic ProceduresFigure 2-4 IP21 Board Error Detection LogicAddr/Cmd (48 + 2 Parity)Data (256 + 8 Parity)DASICDASICAASICDASICDASIC32154DBO6DB

Strany 122

CHALLENGE/Onyx Diagnostic Road Map 2-13Figure 2-5 IP21 Board Component PlacementDASICDASICDASICDASICAASICDBASICDBASICDBASICDBASICCCASICBusTagRamFPUIUP

Strany 123 - Bit) Error

2-14 Diagnostic ProceduresIP21 Board Error MessagesHARDWARE ERROR STATE:IP21 in slot 1+ A Chip Error Register: 0xffff+ 0:CPU 0 CC-&g

Strany 124 - 5.7.1 IP19 LED Status Codes

CHALLENGE/Onyx Diagnostic Road Map 2-15 D chips on the IP21

Strany 125 - (Constant Value Displayed)

ivClocks Are Good but the ProcessorLEDs Are All Lit... 2-28LEDs Show Failure Code After Starting BootP

Strany 126 - 5.7.2 IP19 LED Error Codes

2-16 Diagnostic Procedures was prevented from sending to

Strany 127 - 5.7.3 IP21 LED Status Codes

CHALLENGE/Onyx Diagnostic Road Map 2-17 the bus, but never got a

Strany 128

2-18 Diagnostic Procedures2.4.1.3 IO4 Interface BoardFigure 2-6 is a functional block diagram of the IO4 board and VCAM with the errordetection points

Strany 129

CHALLENGE/Onyx Diagnostic Road Map 2-19Figure 2-7 IO4/VCAM Component LocationsDASICAASICDASICDASICDASICEPCFChipS1FChipMap RAM

Strany 130 - 5.7.4 IP21 LED Error Codes

2-20 Diagnostic ProceduresIO4/VCAM Error Messages+ IO4 board in slot 5+ IA IBUS Error Register: 0x7ffff+ 0: Sticky Error

Strany 131 - (Flashing Value Displayed)

CHALLENGE/Onyx Diagnostic Road Map 2-21+ 3: Non Existent IOA 3 No F/S1/EPC configured at

Strany 132

2-22 Diagnostic Procedures 7 Error from EPC to IA+ 15..12: EPC Sent- DMA (Enet) Write Request Co

Strany 133

CHALLENGE/Onyx Diagnostic Road Map 2-23 on command from F+ 13: Address Map Request IBus Comma

Strany 134

2-24 Diagnostic Procedures+ 7 : Error in SCSI Data DMA channel 1 6 detected error from SCSI+ 8 : Error in SCSI Data DMA channel 2 6

Strany 135 - 6.2 Running an IDE Test

CHALLENGE/Onyx Diagnostic Road Map 2-25Figure 2-8 MC3 Memory Board Error Detection LogicAddr/Cmd (48 + 2 Parity)Data (256 + 8 Parity)MDASICMDASICMAASI

Strany 136 - 6.3 IO4 IDE Tests

v3. Power Subsystem ...3-13.1 Overview...

Strany 137

2-26 Diagnostic ProceduresFigure 2-9 MC3 Board Component LocationsFigure 2-10 MC3 SIMM Bank and Leaf OrganizationMDASICMDASICMDASICMDASICMAASICLeaf 0L

Strany 138 - 6.3.1 IO4 Interface

CHALLENGE/Onyx Diagnostic Road Map 2-27MC3 Memory Board Error Messages+ MC3 in slot 3+ MA Ebus Error register: 0xf+ My EBus Address Error

Strany 139 - 6.3.2 VME Adapter

2-28 Diagnostic ProceduresNote: If the 5.0V brick has failed, it will still show approximately 2.5V, owing to the 3.3Vbrick pulling up through the ASI

Strany 140 - Test Function Description

CHALLENGE/Onyx Diagnostic Road Map 2-294. Check the reset line (pin 20) to the CC chip.5. If the reset line does not pulse when the SCLR line is enabl

Strany 141

2-30 Diagnostic Procedures2.5.1.12 IP21 LEDs Show a Static 0x12 PatternSystem is stuck in bootmaster arbitration. Diagnose per Section 2.5.1.11, “IP19

Strany 142 - 6.3.3 SCSI Adapter

CHALLENGE/Onyx Diagnostic Road Map 2-31Select the Debug Settings menu and toggle bit 7 (the Manu-Mode bit) to select the SystemController UART. Refer

Strany 143

2-32 Diagnostic ProceduresReturn to the default debug settings by simultaneously pressing the Menu and ScrollDown buttons while cycling the key switch

Strany 144

CHALLENGE/Onyx Diagnostic Road Map 2-332. Enter the following command at the DBG prompt:stop3. Next, enter the cpu command to display a list of proces

Strany 145 - 6.4 IP19 IDE Tests

2-34 Diagnostic Procedures9. When you are finished using POD mode, repeat steps 1 through 7, and reset bits 4 and5 so that the system boots normally.2.

Strany 146

CHALLENGE/Onyx Diagnostic Road Map 2-352.6 Error Message SyntaxEverest hardware errors are displayed following IRIX kernel panics, in the IDE stand-al

Strany 147 - 6.4.1 IP Tests

vi5.6 IP19 PROM Error and Status Messages... 5-155.6.1 IP19 PROM Messages (Short Form)...

Strany 148 - R/W error: Wrote

2-36 Diagnostic Procedures2.7 Known ProblemsThis section lists some known hardware and software problems, as of this writing.2.7.1 IRIX 5.0.1Bugs in

Strany 149

CHALLENGE/Onyx Diagnostic Road Map 2-37This problem also shows up as a system hang, where the system does not echo characterson the serial console, no

Strany 150

2-38 Diagnostic Procedures2.7.7 IP19 EAROM CorruptionThere is an EAROM for each CPU on an IP19 board. A board problem, in IP19 boardsearlier than -008

Strany 151

CHALLENGE/Onyx Diagnostic Road Map 2-39If you suspect this, check the termination voltage supplied by the System Controller. Usethe Voltage Status men

Strany 152

2-40 Diagnostic Procedures pb 0: + IP19 in slot 3 pb 1: + CC in IP19 Slot 3, cpu 1 pb 2: + CC ERTOIP Register: 0x10 pb 3: + 4:Parity Error on Data fro

Strany 153

CHALLENGE/Onyx Diagnostic Road Map 3-1Chapter 33. Power Subsystem3.1 OverviewThe power subsystem consists of the offline switchers (OLSs), the midplane

Strany 154

3-2 Power SubsystemFigure 3-1 Power Subsystem Block DiagramOLS 1PFWRI_LOLS 2PFWRI_LOLS 3PFWRI_LPFWARIAPFWBRIBPFWCRICL & XL ChassisXL ChassisXL w/C

Strany 155

CHALLENGE/Onyx Diagnostic Road Map 3-3When the system is turned on, the power subsystem goes through a series of voltage checksbefore the boot process

Strany 156

3-4 Power SubsystemFigure 3-2 Rackmount and Deskside Status Panel and OLS Power and Fault IndicatorsDisplayKey SwitchFault LED Power LEDOff-line Switc

Strany 157 - 6.4.4 Cache Tests

CHALLENGE/Onyx Diagnostic Road Map 3-53.2.2 System and Power BoardsThis section provides the locations of the power fault indicators on each of the sy

Strany 158

vii7. IRIX Error Reporting ...7-17.1 Overview...

Strany 159

3-6 Power SubsystemFigure 3-4 MC3 Board Fault Indicator and Power Brick Locations3.2.2.3 IO4/VCAM BoardThe IO4 board has a single bank of five LEDs and

Strany 160

CHALLENGE/Onyx Diagnostic Road Map 3-7Figure 3-5 First IO4 Board/VCAM Fault Indicator and Voltage Regulator Locations3.2.2.4 Remote VCAM (RMT_VCAM) Bo

Strany 161

3-8 Power SubsystemFigure 3-6 Remote VCAM Fault Indicator and Voltage Regulator Locations3.2.2.5 Mezzanine (F Mezz and S Mezz) BoardsBoth F mezzanine

Strany 162

CHALLENGE/Onyx Diagnostic Road Map 3-9Figure 3-7 F Mezzanine Board Fault Indicator and Voltage Regulator Locations3.2.2.6 Power BoardsThe are five diff

Strany 163

3-10 Power SubsystemFigure 3-9 SCSIBox Fault Indicators3.3 Power-On SequenceNote: The power switch (main circuit breaker), located in the lower right

Strany 164

CHALLENGE/Onyx Diagnostic Road Map 3-11• PEND: controls 5 and 12 volts for the optional, second SCSIBox (rackmount systemsonly)• PENE: controls 5 and

Strany 165

3-12 Power SubsystemFigure 3-11 Power-On Sequence (Part 1 of 2)Main power switch on.Status panel key switchin ON position. 48 VDCapplied to backplane.

Strany 166

CHALLENGE/Onyx Diagnostic Road Map 3-13Figure 3-12 Power-On Sequence (Part 2 of 2)When the system has successfully powered up, the System Controller d

Strany 167

3-14 Power SubsystemSee Figure 3-13 for the power-enable/power-ok signal timing. Note that the enable signalsare PENx (TTL_H), and that the fault sign

Strany 168

CHALLENGE/Onyx Diagnostic Road Map 3-15all OR-tied together, so a failure sensed by any of the POK lines indicates the failing voltagebut cannot isola

Strany 170

3-16 Power SubsystemFigure 3-15 Power Subsystem Voltage MonitoringThe System Controller monitors the midplane/backplane voltages: +1.5, +5, +12, -5.2,

Strany 171

CHALLENGE/Onyx Diagnostic Road Map 3-17Table 3-4 provides the voltage ranges monitored by the System Controller, and two sets ofvoltage thresholds: th

Strany 173

CHALLENGE/Onyx Diagnostic Road Map 4-1Chapter 44. Using the System Controller4.1 OverviewThe Everest System Controller is a microprocessor with a batt

Strany 174

4-2 Using the System ControllerFigure 4-1 System Controller Input/Output Signals4.2 Basic FunctionsThis section provides a step-by-step description of

Strany 175

CHALLENGE/Onyx Diagnostic Road Map 4-3stopped, a “Blower Failure” message is displayed. All three conditions result in a systemshutdown.4.2.3 Power-On

Strany 176

4-4 Using the System Controller4.2.5 Initiating a System Power-OffIf a condition is detected that calls for a system shutdown, the System Controller i

Strany 177 - Possible errors:

CHALLENGE/Onyx Diagnostic Road Map 4-54.3 Error MessagesThere are six categories of error messages displayed by the System Controller:• bootmaster arb

Strany 178 - 6.5 MC3 IDE Tests

4-6 Using the System ControllerPOKD FAIL Same as above.POKE FAIL The System Controller detects a power supply fault. Thecondition is logged but no pow

Strany 179

CHALLENGE/Onyx Diagnostic Road Map 4-7The area and possible solution for each error message in the previous table is general bydefault. To obtain more

Strany 180

ixFiguresFigure 1-1 Everest Functional Block Diagram... 1-2Figure 1-2 IO4 Functional Block Diagr

Strany 181 - – word and byte

4-8 Using the System Controller• Plug your laptop into the System Controller port, labeled External ControllerSerial, using the cable permanently atta

Strany 182

CHALLENGE/Onyx Diagnostic Road Map 4-9COP FAILURE The Computer Operating Properly (COP) timer hasexceeded time limits. The System Controller firmwaremu

Strany 183

4-10 Using the System ControllerNote: Internal errors will cause an error message to be displayed, but will not shut downthe system.4.4 Sensor Locatio

Strany 184

CHALLENGE/Onyx Diagnostic Road Map 4-11Figure 4-3 Rackmount System Controller Sensors4.5 Menu HierarchyThis section provides a sequential listing of t

Strany 185 - 7. IRIX Error Reporting

4-12 Using the System ControllerFigure 4-4 System Status Panel (Deskside and Rackmount Versions)FaultLEDPower OnLEDMenu ScrollUpScroll DownExecute Key

Strany 186

CHALLENGE/Onyx Diagnostic Road Map 4-134.5.1 Key Switch in the On PositionThere are four menus that are accessible when the key switch is in the On po

Strany 187

4-14 Using the System ControllerFigure 4-6 System Controller Menus: Manager Position4.5.3 Debug MenuThe Debug Menu allows you to set several switches

Strany 188 - 7.3 Warning Messages

CHALLENGE/Onyx Diagnostic Road Map 4-15• choosing whether or not to clear memory on system reset• resetting the non-volatile RAM (NVRAM) configuration•

Strany 189 - 7.4 Driver Messages

4-16 Using the System ControllerFigure 4-7 System Controller Menus: Debug SettingsPressing the Execute button displays 16 bits:ScrollDebug Settings0 0

Strany 190 - Firmware compensating for

CHALLENGE/Onyx Diagnostic Road Map 5-1Chapter 55. PROM Monitor5.1 OverviewThis Chapter describes the power-on tests, describes how the Everest boards

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